ViewSonic G90FB-2 Service Manual Page 13

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4-1 Micro controller and deflection circuit
MICRO Controller
The micro controller(IC101) core is a 80C51 type. The micro clock frequency of 12 Mhz is derived from the Xtal
oscillator,which is running at 48MHz. The DDC interface is suitable to handle DDC2 by a modified hardware I
2
C-bus
interface .Standard high current ports,3 ADC pouts with voltage inputs and 4 static standard 8 bit DAC outputs (low
interference) and one PWM output for digital control application are implemented. The central processing unit (CPU)
manipulates operands in two memory spaces.These are the 1024byte internal data memory(consisting of 256 bytes
standard RAM and 768 bytes AUX-RAM) and 48K-byte internal program memory . The programmemory of the
SAA4849 consists of 48K bytes ROM.
The SAA4849P provides sync. Processing with full auto sync. Capability, a flexible SMPS block and an extensive
set of geometry control facilities. Further the IC generates the drive waveforms for DC coupled vertical boosters to the
TDA8172.
H/V sync signals processor
The functions of the sync processor include polarity detection, H-SYNC & V-SYNC signals counting, Programmable
SYNC signals output, free running signal generator. Pin52/Pin53 are for the H-SYNC and V-SYNC input. and the
polarity are setting in the positive. When no signal input, the Pin49 will output a 75Hz V-SYNC free run signal. The
Pin18/20will output a 60KHz H-SYNC free run signal. for the monitor testing use.
Reset Circuit (pin23)
There are three ways possible to invoke a reset and initialize the SAA4849 micro controller part:
Via power-on reset circuit
Via watchdog timer overflow(only micro controller reset)
Via deflection reset after start up (only micro controller reset)
The reset pin(pin23) is connected to a Schmitt trigger for nose reduction. A reset is accomplished by holding the Reset pin
HIGH.
2.7K
R153
+
22U
C145
0.1UF
C102
x-ray protection
5V
RST Pin23
4. Circuit Description
ViewSonic Corporation Confidential - Do Not Copy G90fB-4
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